llvm-snippy: Testing RISC-V Hardware with Random Tests

Hardware verification is a complex process in which test generators play a key role. This talk is dedicated to a new test generator called llvm-snippy, which was recently open-sourced. The key feature of this generator is that it is based on the LLVM compiler and has a separate interface for connecting models. Thus, the composition, encoding, and semantics of instructions can be reused.

We will consider the capabilities of the generator, and we will discuss the real challenges of generating random verification tests and how compiler technologies can help in this task.